Description:
This deals with the fabrication steps of integrated circuits, scaling of MOS devices and their limitations after scaling, stick and layout diagrams of CMOS logic circuits.
Basic concepts of MOS devices like resistance, capacitance, delay and area occupied by MOS devices, building blocks of analog IC design are also studied in different configurations of MOS transistor like common drain, common gate and common source with diode and resistive loads.
Static and dynamic CMOS design where several combinational and sequential circuits have been built in terms of MOS transistors. latest technologies like FinFET and High-k dielectric are studied.
Prerequisite
• Better to have knowledge on Digital IC design and CMOS circuit design.
For whom
• For Electronics students to help them understand the basic to advance concepts related to VLSI.
• Students those who are preparing them for Engineering syllabus.
Reference Books
1. Essentials of VLSI Circuits and Systems – Kamran Eshraghian, Douglas and A.Pucknell and Sholeh Eshraghian, Prentice-Hall of India Private Limited, 2005 Edition.
2. Design of Analog CMOS Integrated Circuits by Behzad Razavi, McGraw Hill, 2003
3. Digital Integrated Circuits, Jan M.Rabaey, Anantha Chandrakasan and Borivoje Nikolic, 2 nd edition, 2016. 4. “Introduction to VLSI Circuits and Systems”, John P.Uyemura, John Wiley&Sons, reprint 2009.
5. Integrated Nano electronics: Nano scale CMOS, Post-CMOS and Allied Nano technologies Vinod Kumar Khanna, Springer India, 1 stedition, 2016.
6. Fin-FETs and other multi-gate transistors, Colinge JP, Editor NewYork, Springer, 2008.
Q1 . Derive the relationship between drain to source current Ids verses drain to source voltage Vds in non-saturated and saturated region.
Q2 . Derive the expression for the ratio between Zp.u and Zp.d if an nMOS inverter is to be driven from another nMOS inverter.
Q3 . a) Explain and derive the expressions for MOS transistor parameters gm, gds and ω0.
b) Explain the structures of n MOS enhancement mode, depletion mode and p-MOS enhancement mode transistors.
Q4 . a) Illustrate with neat sketches CMOS n-well fabrication process indicating the masks used.
b) Explain the Latch-up effect in CMOS circuits with suitable diagrams.
Q5 . a) Design a stick diagram for the CMOS logic shown Y = (AB+CD)'
b) Design a layout diagram for CMOS 3-input NAND gate.
Q6 . a) Describe three sources of wiring capacitances. Explain the effect of wiring capacitance on the performance of a VLSI circuit.
b) Define & explain standard unit of capacitance.
Q7 . a) Explain in detail about formal estimation of CMOS inverter delay.
b) Two nMOS inverters are cascaded to drive a capacitive load CL = 16Cg. Calculate pair delay Vin to Vout in terms of τ
Q8 . a) Derive the expression for propagation delay in the case of cascaded pass transistors.
b) What is meant by sheet resistance Rs? Explain the concept of Rs applied to MOS transistors.
Q9 . Calculate on resistance of an inverter from VDD to GND. If n- channel sheet resistance Rsn = 104 Ω per square and P - channel sheet resistance Rsp = 3.5 × 104 Ω per square. (Zpu = 4 : 4 and Zpd = 2 : 2).
Q10 . a) Explain different regions of operations of MOSFET
b) Describe current sourcing and sinking in MOSFETs
Q11 . a) Derive the necessary parameters for Common Gate amplifier.
b) Derive the necessary parameters for Common source amplifier with resistor load.
c) Derive the necessary parameters for Common Drain amplifier.
Q12 . a) Compare the advantages of ratioed logic over complementary CMOS logic.
b) Draw the logic diagrams of MUX based Latches
c) What is DCVSL logic and explain with diagram
Q13 . a) Design NAND and NOR gates using pass transistor logic
b) What are the issues in dynamic logic design?
Q14 . a) Explain the concept of reduced clock load master slave register
b) Draw the circuit to generate two phase non overlapping clock
Q15 . a) What are the different programming technologies and explain in brief.
b) List out the various FPGA families. Explain how they are different from each other?
Q16 . a) Explain the architecture of XILINX ALTERA FLEX FPGA. Describe the internal blocks in it.
b) Give brief introduction of FinFET with diagrams. Discuss different FinFET configurations with digrams.
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